Act 04 · The physical machine 2:30 Interconnects, latency, batching

The hidden cost: the interconnect.

Chip-to-chip links form a hierarchy (NVLink → PCIe → network), and the tier you have decides which model-splits are even viable.

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Key ideas

  • The one idea — Chip-to-chip links form a hierarchy (NVLink → PCIe → network), and the tier you have decides which model-splits are even viable.
  • How it is shown — The same sawn model run over three link tiers — humming, laboring, drowning — the chatter-tax meter telling the story.
  • The trap to avoid — Expecting two consumer cards to behave like a datacenter pair — the missing ingredient is the link, not the cores.
  • What it sets up — One machine serving MANY users.

Plug two gaming GPUs into one PC and you'd think you own a mini datacenter. You don't. The datacenter's secret isn't the cards — it's the wiring between them.

The one idea

Chip-to-chip links form a hierarchy (NVLink → PCIe → network), and the tier you have decides which model-splits are even viable.

Every split of the last three episodes wrote a check something must cash: the talking. Partial results, activations, gradients — all of it crosses chip-to-chip links, and those links charge by the byte. Today, the tax code: the hierarchy that decides what your hardware can even attempt. Three tiers. Datacenter cards get private spans — NVLink-class, hundreds of gigabytes a second, GPU to GPU. Consumer cards talk through the motherboard's shared artery — PCIe — roughly ten times narrower. Between machines: the network, narrower again. A stride, a walk, an expedition — same bundle, wildly different fares. Now overlay the splits. The tensor saw, stitching every layer, hums on tier one, labors on tier two, drowns on tier three.

How it works — the demo

The same sawn model run over three link tiers — humming, laboring, drowning — the chatter-tax meter telling the story.

The pipeline, whispering between floors, tolerates all of them. The whole compatibility chart — and why episode one-oh-five's rule existed: your link tier picks your legal surgeries before your budget picks cards. Hence: your two-card rig isn't a mini-datacenter. Consumer cards dropped private spans generations ago — you get the artery, so the saw is off the table. Floors work: two twenty-four-gig cards make one forty-eight-gig warehouse, running models neither could hold. Capacity, not fusion. The right cut for the bridge you own. The tax scales all the way up: training campuses buy exotic network fabrics because ten thousand GPUs averaging gradients is one enormous conversation. Notice the fractal: inside a chip, between chips, between servers, between halls — at every scale, the pipe between is narrower than the hunger within. One law, all act long.

The trap to avoid

Expecting two consumer cards to behave like a datacenter pair — the missing ingredient is the link, not the cores.

Why it matters — and what’s next

One machine serving MANY users.

The trap: shopping multi-GPU by cores and memory while the link line sits in fine print. For split workloads, that fine print is the headline — organism, or queue at a tollbooth. Before buying a second GPU, know which bridge connects them and which surgery that bridge permits. The booth always collects. So the machine is built and the taxes are mapped. Now open the doors — because a served model faces millions of small, impatient requests, and "fast" turns out to mean two things that fight. Fast for you, or fast for everyone: pick one to optimize. Next: latency versus throughput.

This is one short episode in AI: Zero → Frontier, a step-by-step climb through how AI actually works. Each episode builds only on the ones before it.

Full transcript 2:30 of narration

Every split of the last three episodes wrote a check something must cash: the talking. Partial results, activations, gradients — all of it crosses chip-to-chip links, and those links charge by the byte. Today, the tax code: the hierarchy that decides what your hardware can even attempt.

Three tiers. Datacenter cards get private spans — NVLink-class, hundreds of gigabytes a second, GPU to GPU. Consumer cards talk through the motherboard's shared artery — PCIe — roughly ten times narrower. Between machines: the network, narrower again. A stride, a walk, an expedition — same bundle, wildly different fares.

Now overlay the splits. The tensor saw, stitching every layer, hums on tier one, labors on tier two, drowns on tier three. The pipeline, whispering between floors, tolerates all of them. The whole compatibility chart — and why episode one-oh-five's rule existed: your link tier picks your legal surgeries before your budget picks cards.

Hence: your two-card rig isn't a mini-datacenter. Consumer cards dropped private spans generations ago — you get the artery, so the saw is off the table. Floors work: two twenty-four-gig cards make one forty-eight-gig warehouse, running models neither could hold. Capacity, not fusion. The right cut for the bridge you own.

The tax scales all the way up: training campuses buy exotic network fabrics because ten thousand GPUs averaging gradients is one enormous conversation. Notice the fractal: inside a chip, between chips, between servers, between halls — at every scale, the pipe between is narrower than the hunger within. One law, all act long.

The trap: shopping multi-GPU by cores and memory while the link line sits in fine print. For split workloads, that fine print is the headline — organism, or queue at a tollbooth. Before buying a second GPU, know which bridge connects them and which surgery that bridge permits. The booth always collects.

So the machine is built and the taxes are mapped. Now open the doors — because a served model faces millions of small, impatient requests, and "fast" turns out to mean two things that fight. Fast for you, or fast for everyone: pick one to optimize. Next: latency versus throughput.

Hardware & InferenceHardwareParallelism